IEEE

Efficient Hardware Accelerator Design for AES Encryption Using High-Level Synthesis Techniques

Abstract: In this work, we present the design and implementation of a hardware accelerator for AES encryption and decryption using AMD Vitis HLS and Xilinx Vivado. The primary objective of this work ...
Scientific Research Publishing

Entangled Cyclical Encryption Architecture: The Paradigm Cipher for a Fractured World ()

Koch, J. (2025) Entangled Cyclical Encryption Architecture: The Paradigm Cipher for a Fractured World . Journal of ...